Identification of ZVS Points and Bounded Low-Loss Operating Regions in a Class-D Resonant Converter

This article presents an analysis of the different loss modes switching devices in a class-D series resonant converter operating with either fixed dead time or duty cycle. A feasible region where FETs inverter stage only exhibit reverse conduction losses, no hard-switching, is identified. Furthermore, impact using versus cycle investigated. We find that superior to cycle, as broader range can be achieved for same lower losses. reduction losses up 59% expansion operational frequency by 33% when found. The modeling approach validated on 1-MHz prototype employing GaN devices. Lastly, design example shows how presented used determine optimal time/duty use modulation control such are minimized.